This paper presents a high speed PCM demodulation circuit through which the serial parallel converter plays a role of demodulating and the hardware realizes frame synchronization.
为了从接收到的PCM码中还原出原始信号，阐述了一种由硬件实现帧同步，由串并转换器完成PCM码解调器的高速PCM码解调器电路。
It becomes more difficult to realize frame synchronization with higher data transfer speed, and this field applies mostly high-speed digital circuits technique.
随着数据传输速率增高，其帧同步的实现就越来越困难，而该领域主要是应用高速数字电路技术。
In this paper, a new design of frame synchronization acquisition scheme in the high-speed multi-tone HF MODEM is proposed, and the theoretical formula of the design is derived.
本文提出了一种并行体制无线数传机新的帧同步建立方案，并给予理论公式的推导。
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